1. Field of Invention
The present invention relates to a solid state imaging device, a method of producing the same and a camera, more particularly relates to a solid state imaging device having light receiving portions configured by embedded photodiodes, a method of producing the same and a camera.
Further, the present invention particularly relates to a charge coupled device (CCD) type solid state imaging device, a method of producing the same and a camera.
2. Description of the Related Art
An embedded photodiode is employed as a light receiving portion of a CCD. In an embedded photodiode, all of the pn junctions exist in the substrate, therefore dark current is suppressed. A light receiving portion formed by an embedded photodiode has an n-type charge accumulation layer and a p+-type positive hole accumulation layer formed in a surface layer of the charge accumulation layer.
The charge accumulation layer and the positive hole accumulation layer are formed by ion implantation after forming a transfer electrode (refer to, for example, Japanese Patent No. 3320589). The location of the n-type charge accumulation layer exerts an influence upon the read-out voltage and blooming characteristics, therefore these characteristics can be stabilized by forming the charge accumulation layer by self alignment with the transfer electrode. Further, the location of the positive hole accumulation layer exerts an influence upon the read-out voltage and dark current value, therefore these characteristics can be stabilized by forming the positive hole accumulation layer by self alignment with respect to the transfer electrode.
For the n-type charge accumulation layer, the method of forming the same by the ion implantation before the formation of the transfer electrode is disclosed in, for example, Japanese Patent No. 2866351. This process became possible by improvement of the overlay precision in exposure systems. By forming the n-type charge accumulation layer before the formation of the transfer electrode, the charge accumulation layer is enlarged and the sensitivity can be improved.
Further, in order to increase the amount of the charge handled by the vertical transfer portion (vertical transfer CCD) of a CCD solid state imaging device and realize both full pixel reading and thinning of the pixel signals, it is necessary to prepare three or more transfer electrodes per pixel and drive three or more phases.
The above transfer electrodes have been formed by using three or more polycrystalline silicon layers. In this case, the transfer electrodes are arranged with their ends superimposed on each other. Along with the miniaturization of pixel size, however, the effects of the superimposition of the transfer electrodes and surface relief shapes configuring the vertical transfer portion become conspicuous. Namely, blocking of incident light, that is, blocking of the light which originally should strike the light receiving portion due to a light blocking film, is liable to occur due to the surface relief shapes. As a result of this, the amount of the light incident upon the light receiving portion is reduced. This leads to a reduction of the light sensitivity.
In order to reduce the surface relief shapes of vertical transfer portions, a method of forming transfer electrodes having a single-layer structure by one polycrystalline silicon layer is proposed in, for example, Japanese Patent Publication (A) No. 2003-7997. In the method disclosed, however, it is necessary to connect the transfer electrodes in the horizontal direction, therefore two or more interconnects have to be laid between pixels. In this case, it suffers from the disadvantages that the distance between adjacent pixels in the vertical direction becomes larger, the areas of the light receiving portions are reduced, and the light sensitivity and the amount of charge handled by the light receiving portions are reduced. There is also the method of making the potential of the light receiving portions deeper to maintain the amount of charge handled, but in this case, there is the disadvantage that the read-out voltage becomes high.
A structure using single-layer structure transfer electrodes and providing drive interconnects (shunt interconnects) to supply transfer pulses to the transfer electrodes in a layer above the transfer electrodes is disclosed in, for example, Japanese Patent No. 3123068. However, most structures provide the drive interconnects along the vertical transfer portions in the vertical direction. When arranging the drive interconnects in the vertical direction, it suffers from the disadvantages that the transfer mode is restricted and it is hard to realize the thinned out transfer of pixels.